1. Field of the Invention
The present invention generally relates to chip packaging, and more particularly, to a package of a Quad Flat No-lead (QFN) structure.
2. Description of the Related Art
QFN is a no-lead package in a square shape or a rectangular shape. A solder pad having a large exposed area is provided at the central position of the bottom of the package to provide a heat transfer effect, and an electrically conductive solder pad for implementing electrical connection is provided at the periphery of the package having a large solder pad. Because gull-wing-form leads as in conventional SOIC and TSOP packages are not provided in a QFN package, the conductive path between internal leads and the solder pad is short, and both a coefficient of self-induction and wiring resistance inside a package are low. Therefore, it provides excellent electrical performance. In addition, it further provides desirable heat dissipation performance by means of an exposed lead frame solder pad, and the solder pad provides a passage for direct heat dissipation, so as to release heat inside the package. Usually, a solder pad for heat dissipation is directly soldered on a circuit board, and heat dissipation vias in a PCB help dissipation of excessive power consumption to a copper ground plate to absorb excessive heat.